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Semiconductor Manufacturing Tour
Table of Contents
The Chip-Making Process
Making the Wafer
The Mask-Making Process
Epitaxy
Photolithography Process
Oxidation & Exposure
Etch & Strip
Diffusion & Implant
Deposition
Oxidation
Interconnect - Vias
Interconnect - Metallization
Chemical Mechanical Planarization
Interconnect - Layers
Inspection & Measurement
Yield Impact.......
Test, Assembly & Packaging
Wafer Probe or Test
Memory Repair
Assembly & Packaging
Package Test
The Chip-Making Process
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Slide 21 of 22
Notes:
Package test is the last time that chips are tested to see if they function as they were designed to do before leaving the factory. There are three basic tools used as a set to perform this operation.
First, the handler is a material handling system that takes packaged devices from their carriers, loads them into contacts or sockets and sets the environmental temperature as specified.
Secondly, each pin on the chip's package must be contacted by inserting it into a contactor or socket on a custom designed PC board known by many as a DUT Board or Load Board.
Thirdly, the functional tester or automatic test equipment (ATE) is capable of functionally exercising all of the chip's designed features under software control. Any failure to meet the published specification is identified by the tester and the device is binned as a reject. The tester/handler combination may be able to contact and test more than one part at a time in parallel for increased productivity.
Often, chips are tested at more than one temperature, so each chip may be tested two, three or more times before being shipped.
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