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Semiconductor Manufacturing Tour
Table of Contents
The Chip-Making Process
Making the Wafer
The Mask-Making Process
Epitaxy
Photolithography Process
Oxidation & Exposure
Etch & Strip
Diffusion & Implant
Deposition
Oxidation
Interconnect - Vias
Interconnect - Metallization
Chemical Mechanical Planarization
Interconnect - Layers
Inspection & Measurement
Yield Impact.......
Test, Assembly & Packaging
Wafer Probe or Test
Memory Repair
Assembly & Packaging
Package Test
The Chip-Making Process
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Slide 8 of 22
Notes:
The classic approach to creating pockets of silicon with different electrical properties was to deposit a dopant material, such as Boron, on the surface, then diffuse or drive it into the surface of the silicon by exposing it to controlled periods of high temperature.
As device geometries have become smaller, the side-ways diffusion has become more difficult to deal with, so the industry has converted to the ion implantation process. In implant, the dopant molecules are implanted vertically into the surface of the silicon by a high-energy ion beam. This penetrates the silicon vertically without any appreciable side-ways diffusion.
These regions are now doped with negative ions, creating n-type source and drain regions of the transistor in a p-type silicon base. To complete the n-channel CMOS transistor, we must next create the gate region....
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